ICH10R FIS based switching & Port Multiplier ?

VDiesel

Weaksauce
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Back in March one of the big buzzes surround the release of ICH10R was FIS based port switching and port multiplier support.

While ICH9R always supported port multipliers it was Command Based switching meaning only data only flowed one drive at a time vs FIS's open data flow to all connected drives.

This is an interesting solution for media server backups. While my main media data will be managed by an Areca raid card, ICH10R offers a great cost effective backup solution for this data.

One Sata port of onboard ICH10R can be converted with a simple eSata adapter and connected to an external drive bay housing a port multiplier card and up to 5 x 1TB drives and since it's external it can be connected to any other system for recovery in the event of a hardware failure.

I've searched but didn't manage to find anything on this.
Did ICH10R finally get released with FIS based switching ?
 
Hate to revive an old thread, but does anyone know if the ICH10R supports FIS based port multiplication?
 
According to this no.
https://ata.wiki.kernel.org/index.php/SATA_hardware_features#Key

Not being familiar with what you where talking about (Thanks for the good question, I like learning about new stuff) I edumacted myself some and pulled the data sheet.

http://www.intel.com/Assets/PDF/datasheet/319973.pdf

(do a search in the pdf of FIS. There is a whole FIS control register set, I just picked a couple of examples, below)

5.16.2.2
The SATA host controller supports 48-bit LBA through the host-to-device register FIS
when accesses are performed via writes to the task file. The SATA host controller will
ensure that the correct data is put into the correct byte of the host-to-device FIS.


Also
14.3.2.3 PxSERR—Serial ATA Error Register (D31:F2)

Bit 25
Unrecognized FIS Type (F): Indicates that one or more FISs were received by the
Transport layer with good CRC, but had a type field that was not recognized.

I am taking a wild guess and thinking they use the same base silicon for the consumer (ICH10) and commercial (PX server version) and am thinking only the server version is configured for FIS. That is only a guess after going through the data sheet several times. The registers certainly appear to exist but I cannot quite make out if they are active in the consumer version and while the software manual for the device might tell me I dont want to dig that deep.

Really out on a limb here. If you can tell from the data sheet I would love to know as I can see where this would really have a impact on a multiple disk setup that was kept fairly busy.

So in summary, I have no clue.

For anyone interested in figuring out what is being talked about, this was the eaiset to understand summary I found.
http://www.sata-io.org/technology/port_multipliers.asp
 
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Congrats you have triggered my obsessive compulsion to know everything and I am still digging. I begin to think the answer is "No the normal "consumer" version of the ICH10R does not do FIS" but apparently Intel is being very cute about information.

The guys in the Mass Storage forum would likely know off the top of their heads (but thats no fun for me).

Well this summs it up pretty well,
http://forum.wegotserved.com/index.php?/topic/7128-building-my-own-whs-could-use-advice/page__st__20

Reading between the lines it maybe can be implemented by the OEM and that supports my idea the silicon is shared with the server chipsets but since nothing beyond the data sheet is public from Intel I hit a wall. Ouch!.

So as far as I can tell FIS support is in there, if it is turned on is another question and I cant find a hard answer.
 
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Congrats you have triggered my obsessive compulsion to know everything and I am still digging. I begin to think the answer is "No the normal "consumer" version of the ICH10R does not do FIS" but apparently Intel is being very cute about information.

The guys in the Mass Storage forum would likely know off the top of their heads (but thats no fun for me).

Well this summs it up pretty well,
http://forum.wegotserved.com/index.php?/topic/7128-building-my-own-whs-could-use-advice/page__st__20

Reading between the lines it maybe can be implemented by the OEM and that supports my idea the silicon is shared with the server chipsets but since nothing beyond the data sheet is public from Intel I hit a wall. Ouch!.

So as far as I can tell FIS support is in there, if it is turned on is another question and I cant find a hard answer.

Bill,

Thanks for the thorough response, I will ask the Data Storage Systems guy if they have any info.

-Chris
 
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