Is DDR5 going to reach CL ratings as low as DDR4?

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Delicieuxz

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Is it simply because DDR5 is new that it currently has much higher CL ratings than DDR4, or is there an underlying difference between DDR4 and DDR5 that means DDR5 will always have a higher CL rating? Like, will there eventually be CL16 DDR5?
 
Each step up in DDR always comes with looser timings but in the end the latency becomes similar even though the timings are looser thanks to the higher frequency which also brings extra bandwidth.
Apparently tCL really doesn't make all that much difference to the performance of DDR5 anyway with tRCD and the sub timings being far more important.
 
This is not my field but I'm pretty sure that a CL30 DDR5 is a faster timing than a CL16 DDR4 simply because a DDR5 has around twice the amount of cycles/transfers.

Obviously I'm not comparing PC4000 with PC6000, but more like PC3200 and PC6400.
 
Are all Hynix A-die or M-die chips physically and effectively the same memory - so, 6000 Mhz 32-38-38-96 Hynix A or M-die is the exact same memory as 6000 Mhz 30-40-40-96 Hynix of the same die, and the CL32 can be timed exactly the same as the CL30, while costing less?
 
As I've said elsewhere, you can't look at CL numbers in isolation without also considering the memory clock. Higher clocked memory necessarily has larger CL numbers because the clock tick is shorter. CL numbers are in clock ticks, so the actual delay has to consider the tick duration as well as the tick count.

Once you run the numbers, it appears that most current DDR5 has a CAS latency somewhere around 12 nanoseconds, whereas vanilla DDR4 is mostly around 10 ns with quite a few kits coming in just a little less (e.g. 3600CL16 which is 8.9 ns). I know of no intrinsic reason why DDR5 has to be slower to respond to the column address select, so I'd expect the CAS latency numbers to start coming down as the technology matures.

Whether CAS latency actually matters for DDR5 to the same degree as it does for DDR4, I've no idea; my default guess would be "yes" but I'd be willing to listen to instruction.
 
DRAM must have sufficient capacitance in the gates to hold up between the refresh cycles and it takes time for that capacitance to charge and discharge and the rate of charge and discharge is limited by the impedance of the circuit and resistance of the gate which is not so easy to decrease without affecting other factors which would likely have a greater impact on its performance. The timings are required to give the gates time to charge and discharge and as the clock frequency increases the more clock cycles it needs to wait. It's possible that smaller process nodes for the circuitry have a small impact on the charge/discharge time of the gates.
 
As already pointed out, latency timings are measured in clock ticks/cycles, so the actual unit of time per tick depends on your overall megatransfer speed.

The ideal measurement of latency would be in nanoseconds, as memory used to be measured in the days before DDR. Mask ROMs could be as high as 200ns, '80s DRAM could be in the 120ns range, FPM was getting down to 70ns and EDO further brought it down to 60ns.

How does modern DDR SDRAM compare, then?

DDR-400 at CL2.5 is 12.5ns, and at CL2, 10ns. Not bad for first-gen DDR, especially considering the rapid progression up to this point with memory latency.

DDR4-3600 at CL19 is 10.55~ns, CL16 is 8.88~ns, and CL14 is 7.77~ns. Overall, the latency is a bit faster despite the numbers looking higher for more delay cycles on paper, and this isn't even accounting for how much faster later generations of DDR become when fetching multiple words.

Also worth noting is that while primary timings are frequently advertised and a good indicator of how performant the RAM kit actually is, secondary and tertiary timings got added along the way and are surprisingly important to overall performance. I've still got a lot to learn with tuning those, as just dialing in good primary timings once you start overclocking the megatransfer speed is already enough of a pain.
 
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Considering I have a 64gb dual rank kit I'd say it's pretty quick at c32 6000 right? The only faster kit I've seen is C30 at this capacity.
 
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