The effect of memory ratios on modern day systems

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Cali3350

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This is a question with some background thrown in so you get where im coming from.

I remember back when I first started building systems (the P3 / Athlon were battling it out) memory ratios were supposed to be synched with the FSB to achieve best performance. For example if you had a 100fsb but ran your memory at 133 you would often achieve LOWER performance due to the system not communicating effectively. With the Athlon I remember it was often better to LOWER your CPU overclock to allow this 1:1 ratio to occur (a Athlon 1400 with fsb/memory of 333/333 was faster than a Athlon 1500 with fsb/mem of 333/400 or 333/266). I have always held this belief with me through modern systems and I just realized I still do this.

For instance, my motherboard currently defaults the FSB/Mem ratio to be 1:1.25. I have never changed this ratio as I simply assumed it allowed for optimal performance. I am wondering if this is still the case. Would a I7 at 3ghz and 1:1 memory be any slower/faster than a I7 at 3ghz with 1:1.25 memory ratio? I *BELIEVE* that today it simply goes faster memory is better and you dont need to worry about any ratio, but I am curious to hear from someone who knows a definitive answer.
 
Some of this from an earlier post so that is why some of it seems out of order logically but I did not feel like spending the time to edit it. The following is stuff I picked up from Intel documents and decent explanations on Anandtech that both followed with what Intel was saying and seemed to have some testing that backed it up. I do not present it as any absolute truth and I sure as hell don't want to argue about it with anyone. Read and decide for yourself and your unique machine and application(s) are likely to be the things that really decide the question. I provide this for general info and not exactly as a direct respone to the OP.


I *BELIEVE* that today it simply goes faster memory is better and you don't need to worry about any ratio, but I am curious to hear from someone who knows a definitive answer.
Click to expand...

For most of us, using common applications, I agree with you and believe, in general, the same thing.


For people using only one memory specific application or who have the tools and time to investigate and insane tweakers with lots of time on their hands and who have the bios options available I think the situation is not so clear.

There is no definitive answer, but in general the extra memory bandwidth/speed will provide a sufficient performance improvement to negate the penalty of buffering and waits due to the buss speed mismatch in memory intensive applications as long as CPU speed and stability are not sacrificed. Note the catch, memory intensive applications, for the most of us, that does not apply.

In regards to OCing, for most of us, it boils down to stability issues. The question becomes by increasing the FSB to the CPU and with a multiplier other (greater) than 1:1 does the increased speed required of the memory controller on the memory side, the buss between the memory controller and the actual sticks and the memory itself reduce stability. The second part of the question is does the board have the advanced bios features to allow fine adjustments in signal skew and voltages to overcome the any distortion of the data on the buss due to the higher frequency of operation. The third part is does the increased latency of the MCH/memory controller in dealing with the high speed mismatch reduce overall system performance such that some other lower MCH to memory buss speed would be more effective?

In general, after you establish the fastest possible FSB in relation to a stable CPU OC, you will want to then see what the fastest memory multiplier/ratio you can run and remain stable. Benchmarking with something that actually transfers data from CPU to memory and back is also helpful.

That said, unless you have spent a lot on very high speed memory, it is not a big deal either way because most of the stuff we run is not hugely memory intensive. Professional photoshop use, 3D modeling and things like that that are memory intensive would be where one would see/feel the benefit.

It all boils down to the scheme the Intel engineers have implemented to handle the mismatch in buss speed across the memory controller. Intel has done some clever stuff and the penalty for not having the classic 1:1 is not what it used to be and in some cases where the CPU has to wait for the much slower memory sub-system to return data, out of order execution on the CPU can be requesting data not in the CPU cache and in main memory while the previous instruction is being fed. Note that most of the time the data would be in the cache, at least one would hope.

On Intel systems without the memory controller embedded in the CPU (C2D's) once you have the memory working anywhere close to rated speed the latency of the MCH/memory controller is where the performance lies and that has a direct correlation to the multiplier/ratio selected. This is a timing delay called tRD (not to be confused with Trd ) and tRD is the MCH latency and is a measure of the total latency of the memory controller.

On Intel C2D's at least (not sure about newer embedded controller chips but I suspect it works the same as it almost has to) the memory controller is just another CPU, one that just "calculates" memory access if you want to think of it that way, that gets overclocked. As the memory controller is asked to work faster it has to "switch in" different amounts of buffering etc. to accommodate the mismatch in buss speeds. These are called "straps" and are sometimes called "Performance levels". So the trick is to find the optimum CPU buss speed along with a ratio/multiplier for fast memory access which also provides a good tRD

Here, if you are not yet confused, this should do the trick.
http://www.anandtech.com/mb/showdoc.aspx?i=3208&p=4
http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3184&p=8
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3239&p=6

Tool for Intel to see most if not all memory timings and in particular tRD (Performance Level)
http://www.tweakers.fr/memset.html
(do not use in write mode unless you know exactly what you are doing).

Short answer:
C2D or Ix get the CPU running as fast as you can, then get the memory running as fast as you can without compromising stability but let it fall out wherever, even if your memory is under clocked. Unless you are doing something strange it is not going to matter a lot. Then see if you can play with reducing your tRD. It very quickly gets complicated and time intensive do do proper testing and if your application suite changes it may all be for nothing.

The larger your CPU on die cache L2 L3, the less it will matter.
 
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