AMDs eight-core is a native one

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benchmark_hunter

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"We were surprised to learn that despite the rumors going around, AMD's eight-core CPU is actually a native one. AMD can do native octa-core just as well as Intel can with its Nehalem, and the codename for this eight-core monster is Montreal. This comes from a highly ranked source at AMD.

So, Montreal is not just two Shanghai quad-cores stitched together, it's a native octa-core 45nm part. This makes sense for servers initially and eventually it will also launch for the ultra high-end gaming market.

Of course, this all happens in 2009."



http://www.fudzilla.com/index.php?option=com_content&task=view&id=6154&Itemid=1
 
Not to be rude but I believe the "native" marketing crap is over. At the end of the day it comes down to the performance it provides and if its better then its competitors, and not because its "native."
 
Here's a cookie for AMD, but i'm withholding it until the working revision of the 6 month old quad core ramps. :p
 
I think that there should be a rule here that would permanently ban someone who started a thread based on Fuad or Inq. No offence to the OP. :p
 
I don't get why Fuad posted it as anything new. This was known back in July 2007.
 
Native core design was necessitated by AMD's on-die memory controller. Native core design is necessitated by all octo-cores otherwise they take a major speed hit. I'm personally interested to see where this takes us. The only hype created/debunked is by those dramatics without a profound understanding of microprocessor design. They don't work for either AMD or Intel, Nvidia or ATI, but think they should.
 
vista_blista said:
Native core design was necessitated by AMD's on-die memory controller. Native core design is necessitated by all octo-cores otherwise they take a major speed hit. I'm personally interested to see where this takes us. The only hype created/debunked is by those dramatics without a profound understanding of microprocessor design. They don't work for either AMD or Intel, Nvidia or ATI, but think they should.
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Couldn't there be some sort of direct connect HT link provided across two dice on the same package? The same way multi-socket AMD systems work now? That's how these cores are communicating amongst themselves internally in the die anyway aren't they? Please correct me if I'm wrong, I'm one of those without a "profound understanding of microprocessor design" ;).

http://www.behardware.com/news/8193/amd-direct-connect-2.html
Came up with a couple of articles about the direct connect architecture after doing some googling.
 
Silent.Sin said:
Couldn't there be some sort of direct connect HT link provided across two dice on the same package? The same way multi-socket AMD systems work now? That's how these cores are communicating amongst themselves internally in the die anyway aren't they?
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The cores on an AMD die are not connected by HT links. They utilize a much faster crossbar switch.
 
visaris said:
The cores on an AMD die are not connected by HT links. They utilize a much faster crossbar switch.
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How much faster are we talking about? I realize that the crossbar interface is actually what provides the HT links their access to the cores now that I've read some articles on it, but I can't find any concrete numbers on bandwidth offered by the crossbar switch from core->core.

A full 32-bit 2.6GHz HT3 link can provide 20.8GB/s of bi-directional bandwidth, however, a number still very much above what any FSB can do. There would probably be latency issues associated with doing that I'm sure but that still looks somewhat promising.

I was just hoping that maybe AMD could get an 8-core CPU out there faster if they didn't need to mess with this whole native mess again.
 
vista_blista said:
Native core design was necessitated by AMD's on-die memory controller. Native core design is necessitated by all octo-cores otherwise they take a major speed hit. I'm personally interested to see where this takes us. The only hype created/debunked is by those dramatics without a profound understanding of microprocessor design. They don't work for either AMD or Intel, Nvidia or ATI, but think they should.
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Tell that to Intel then? Pretty sure Intel is going non-native with Nehalem and that has an IMC on it.
 
Silent.Sin said:
I was just hoping that maybe AMD could get an 8-core CPU out there faster if they didn't need to mess with this whole native mess again.
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Yea basically. I thought that they were dropping the native thing for octo-core actually and Im still going to go with that assumption/rumor until I hear otherwise from something more reputable than Fuad or Inq. Although they have far more issues at hand these days than getting out x number of cores per cpu. They need to work on just getting "a" chip out the doors period.
 
Lazy_Moron said:
Nope, its "native."
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Nehalem_at_1st_glance_.jpg


It is not native. This is one Quad die. Nehalem will be 2 of these together.
 
LeviathanZERO said:
http://chip-architect.com/news/Nehalem_at_1st_glance_.jpg[/im g]

It is not native. This is one Quad die. Nehalem will be 2 of these together.[/QUOTE]Beckton is a different chip. The name wasn't released at IDF, but here is the coverage: [url]http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3101&p=2[/url]
[quote]Nehalem: Single die, 8-cores, 731M transistors, 16 threads, memory controller, graphics, amazing.

Intel announced that in its largest configuration, Nehalem (2H 2008, 45nm) will feature 8 cores on a single die, each core supporting 2 threads per core (welcome back Hyper Threading) for a total of 16 threads per physical chip.
[/quote]

[url]http://www.news.com/8301-10784_3-9780925-7.html?part=rss&subj=news&tag=2547-1_3-0-5[/url]
[quote] In 2009, Intel will sell Nehalem processors with eight cores on a single slice of silicon.[/quote]

Nehalem family (2008) = 4 cores on 1 die. Beckton (2009) = server chip with 8 cores on one die.

Intel also put Beckton information in the leaked Sun document: [url]http://forum.beyond3d.com/showthread.php?p=1132943[/url]
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pxc said:
Beckton is a different chip. The name wasn't released at IDF, but here is the coverage: http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3101&p=2


http://www.news.com/8301-10784_3-9780925-7.html?part=rss&subj=news&tag=2547-1_3-0-5


Nehalem family (2008) = 4 cores on 1 die. Beckton (2009) = server chip with 8 cores on one die.
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The transistor count doesn't seem to add up though. We know from current data that the quad core dies have 731M transisters, where as the quote you gave says that the 8 core dies will also have 731M transisters....

To me it doesnt sound right and I am inclined to believe that they are mistaking core count with thread count, and then taking the liberty of assuming that it will have 16 threads under the incorrect assumption that it'll have 8 cores.

In the end all we have is assumption stacked on top of another assumption based on a misunderstanding.
 
duby229 said:
The transistor count doesn't seem to add up though. We know from current data that the quad core dies have 731M transisters, where as the quote you gave says that the 8 core dies will also have 731M transisters....
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That's just one mistake that AT made.

It was clear at IDF last September that Intel said it would have a single die with 8 cores out in 2009. They gave few details on it other than the layout and extra QP links. I'm not going to argue with you because there's no point to it.

Look up Beckton to see what it is.
 
LeviathanZERO said:
Thanks for that. Dunnington was a surprise.
That pdf made me laugh.
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Dunnington is not based on Nehalem, though. It is a hex-core server chip. Essentially, 6 cores based on Penryn (3 Wolfdales) with an L3 cache and pin compatible with Tigerton, possibly S771 as well. Very interesting design.
 
Well so much for all the rumors of Montreal being two Shanghais on an MCM. And it's Fuad, not Faud. Or is that a purposeful typo, leaving out the r between the f and a?
 
Zero82z said:
No.
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Sorry missed that one...

I was refering to this comment that Anand had made....

Nehalem: Single die, 8-cores, 731M transistors, 16 threads, memory controller, graphics, amazing.

Intel announced that in its largest configuration, Nehalem (2H 2008, 45nm) will feature 8 cores on a single die, each core supporting 2 threads per core (welcome back Hyper Threading) for a total of 16 threads per physical chip.
Click to expand...

It clearly says 8 cores and 731M transistors. Just another mistake or misprint or error to add to Anands list of millions.
 
duby229 said:
Sorry missed that one...

I was refering to this comment that Anand had made....



It clearly says 8 cores and 731M transistors. Just another mistake or misprint or error to add to Anands list of millions.
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Fair mistake :). I have to say though, I'm a little disappointed that the name of my great city will be associated with what will likely be another disappointing chip from AMD. Just shrinking the die to 45nm and sticking another four cores on it isn't going to do anything about the inherent deficiencies in the architecture.
 
Who knows, maybe this native 8 core proc will be very good and what phenom should have been...
 
Good ole Fudzilla. Did you know that R520's codename was "Fudo"? lol
 
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