About 6 weeks ago, AMD updated the programming manual vol 4: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26568.pdf
The 4 instructions of SSE4a are (yeah, that's it):
EXTRQ
INSERTQ
MOVNTSD/MOVNTSS
While the 16 instructions added to Conroe in SSSE3 (the first S stands for supplemental) were somewhat significant, the 4 minor instructions added to Barcelona are nowhere near worthy of a whole new designation on the next number level that Intel is making with 54 new instructions in SSE4.
I guess this is part of the strategy to "destroy Intel branding" that AMD stated they intended to do. IMO, this will probably backfire when it gets around that AMD's "SSE4" doesn't work since it's not SSE4 or even a subset of SSE4.
The 4 instructions of SSE4a are (yeah, that's it):
EXTRQ
INSERTQ
MOVNTSD/MOVNTSS
While the 16 instructions added to Conroe in SSSE3 (the first S stands for supplemental) were somewhat significant, the 4 minor instructions added to Barcelona are nowhere near worthy of a whole new designation on the next number level that Intel is making with 54 new instructions in SSE4.
wikipedia said:New SSE instructions named as SSE4a: combined mask-shift instructions (EXTRQ/INSERTQ) and scalar streaming store instructions (MOVNTSD/MOVNTSS). These instructions are not found in Intel's SSE4
I guess this is part of the strategy to "destroy Intel branding" that AMD stated they intended to do. IMO, this will probably backfire when it gets around that AMD's "SSE4" doesn't work since it's not SSE4 or even a subset of SSE4.